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First Call for Papers
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*** IEEE International SOC Conference ***
*** ***
*** September 12-15, 2004 ***
*** Hilton Santa Clara, Santa Clara, California ***
*** ***
*** www.ieee-socc.org ***
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Driven by the rapid growth of the Internet, communication
technologies,
pervasive computing, and wireless and ****table consumer
electronics,
Systems-On-Chip (SOC) has become a dominant issue in today's ASIC
industry.
SOCs have created new challenges in Design Methods, Design Tools,
Design
Automation, Manufacturing, Technology, and Test. The SOC
Conference
provides a forum for sharing advances in SOC technologies and
applications.
SOCC is sponsored by the IEEE Circuits and Systems Society.
GENERAL INFORMATION
SOCC 2004 will offer three days of technical papers and a full day
of
technical workshops at the Hilton Santa Clara in Santa Clara
California.
The Hilton Santa Clara is readily accessible from the San
Jose
International Air****t and the San Francisco International Air****t and
is
located in the center of Silicon Valley California at the Santa
Clara
Convention Center and the Paramount Great America Theme Park. SOCC 2004
is
held in conjunction with Cadence User's Group meeting at Western
Hotel,
which is across the street from Hilton Hotel.
KEYNOTE SPEAKER: Sanjay Jha, President of Qualcomm CDMA Technologies
PLENARY SPEAKER: Kiyoo Itoh, Fellow of Hitachi
SUBMISSION OF PAPER AND WORKSHOP/TUTORIAL PROPOSALS
Electronic paper submission requires a full paper in Adobe PDF, limited
to
four double-column IEEE format pages, including figures and
references.
SOCC 2004 also solicits workshop and tutorial proposals (half-day or
full-
day session) in the related areas of SOC. A proposal with title, a
half-
page summary, and speaker's short bio should be submitted to Workshop
Chair
by April 16. Please refer to the conference web page for details.
SOCC TECHNICAL SCOPE
Papers are invited which address new and previously unpublished results
in
the area of systems on a chip, and related areas and topics. SOCC 2004
is
particularly interested in papers relevant to SOC in deep
submicron
technology.
Analog and Mixed-Signal Design Low-Power Design
Design Tools for SOC Network Processing Architectures
Design for Testability Reconfigurable Architectures
Digital Signal Processing Signal Integrity
RF Design On-Chip Interconnects
Embedded Systems System Level Design Methodology
High-Performance Circuits Wireless Communications
ORGANIZING COMMITTEE
General Chair Tech Program Chair Tech Program Co-Chair
Steve Kang Dong Ha Ram Krishnamurthy
UC Santa Cruz Virginia Tech Intel
kang@[EMAIL PROTECTED]
ha@[EMAIL PROTECTED]
ram.krishnamurthy@[EMAIL PROTECTED]
Pub/Exhibition Chair Steering Committee Chair Workshop Chair
Richard Auletta John Chickanosky Suhwan Kim
Cadence IBM T.J. Watson Research
Center
rauletta@[EMAIL PROTECTED]
chickano@[EMAIL PROTECTED]
suhwan@[EMAIL PROTECTED]
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* DEADLINE FOR PAPER SUBMISSION: APRIL 16, 2004 *
* NOTIFICATION OF PAPER ACCEPTANCE: JUNE 11, 2004 *
* FINAL CAMERA-READY PAPERS DUE: JULY 16, 2004 *
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Please visit the conference web site or contact the SOC Conference
office
at info@[EMAIL PROTECTED]
or 301-527-0900 x104 for paper
submission,
registration, and current conference information.
Sponsored by the IEEE Circuits and Systems Society
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