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Computer Aided Design - CAD > Logic synthesis > OPT314: disabli...
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OPT314: disabling timing arc between pins

by "Verictor" <stehuang@[EMAIL PROTECTED] > Feb 1, 2007 at 12:38 PM

Hi,

After running Synopsys Physical Compiler, I obtained a few OPT314
warnings. Looking in the help message for this warning, I am wondering
what the actual effect would they be.

Can someone share their experience on this warning?

Thanks




 1 Posts in Topic:
OPT314: disabling timing arc between pins
 "Verictor" <  2007-02-01 12:38:45 

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tan12V112 Thu Nov 20 19:50:41 CST 2008.