You can take a look at capacitance modelling section in BSIM3 Ref.
Manual Chapter 4 at UC Berkeley BSIM official site.
http://www-device.eecs.berkeley.edu/~bsim3/get.html
Ozgur
On 4 Eyl=FCl, 10:44, "Ozgur.Ates" <ozgu...@[EMAIL PROTECTED]
> wrote:
> Dear Jorge,
>
> I would like to remind you that for modern processes due to LDD
> structures CGD capacitances are voltage dependent, since depletion
> region capacitance in Lightly Doped areas is voltage dependent.
>
> Cheers,
> Ozgur
>
> On Sep 3, 12:26=A0pm, spectrallypure <jorgela...@[EMAIL PROTECTED]
> wrote:
>
>
>
> > Hi Riad, thanks for your kind reply!
>
> > As a matter of fact, my interest in obtaining these capacitances
> > directly from the simulator is that I want to compare those values
> > with the ones I get from my hand calculations, using the theoretical
> > expressions. Indeed I was using the theoretical expressions for
> > estimating the parasitic capacitances, but the results I get seem to
> > be very different from the ones calculated by the simulator, because
> > the predicted behavior of the circuit is not too much in agreement
> > with the simulated response. Thus it would be really helpful if I
> > could see what are the parasitic capacitances calculated by Spectre
> > and compare them with my theoretical calculations to see were my
> > mistakes are...
>
> > Furthermore, I am a little confused about how to correctly apply some
> > of the expressions found in books. For instance, Allen's book says the
> > gate-source overlap capacitance is
>
> > Cgs(overlap) =3D Cox*Ld*Weff
>
> > where Cox is the oxide capacitance, Ld is the overlap between gate and
> > source, and Weff is the effective channel width. When I try to use
> > this expression, I find the following issues...
>
> > 1. Cox is not found in the (BSIM3v3) model file. I only have dox
> > (oxide thickness), which along with the SiO2 permitivity I use to
> > calculate Cox=3Deox/dox. The parameter Ld is also not found in the
mode=
l
> > file. I only have the Lint parameter, and since the BSIM manual says
> > Leff=3DLdrawn-2Ld, I suspect they are equivalent. However, in my model
> > file this parameter... is negative!!!!! I was told (see
> > groups.google.com/group/comp.cad.cadence/browse_thread/thread/
> > 35bbed8ae25e846a/a7ed4316a8f3c027) that this is due to model fitting,
> > but unfortunately this doesn't resolve the problem of how to calculate
> > Cgs(overlap) using the theoretical expression.
>
> > 2. The book also says, if you have spice models you can forget about
> > the previous expression and just use Cgs(overlap) =3D CGDS0*Weff. Now
> > CGDS0 does appear in the model file, but then I get different values
> > when using the two expressions! What value is "more correct"? I would
> > like to know by "seeing" what is Spectre calculating...
>
> > To summarize, I think having the possibility to see what are the
> > parasitic capacitance used by the simulator is the only way in which I
> > could spot my hand-calculation mistakes and, most im****tantly, get the
> > required insight about what approximations should/can be done when
> > estimating the values of those parasitic elements.
>
> > It would be really interesting to hear how other designers estimate
> > the parasitic elements when performing their hand calculations.
> > Unfortunately I am currently in the academia and not in the industry,
> > and there are no practical designers around here at the moment :(
>
> > ...Any further advice about this issue is welcome. Thanks again for
> > any help!
>
> > Cheers,
> > Jorge.- Al=FDnt=FDy=FD gizle -
>
> - Al=FDnt=FDy=FD g=F6ster -
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