In my own cell library, the IO and power/ground ****ts are all the line
labels. I prefer that in the lef file, they are also line label pins.
For the signal pins, it works fine by assigning them as line shape
pin, but for the power/ground pins, if they are assigned as line shape
pins, the SRoute did not route at all and the Vdd and GND are open
nets. Even if I change only one cell's power and ground pins to square
pins that the SRoute will route normally. But I cannot explain why
does it act like that?
In the soce user guide, it only said that "it connect power and
ground nets from end-to-end, terminating at the power rings."
I checked the solutions for open nets in soce user guide, it suggested
that it might be problems with pins that have hot physical geometry,
which I think the line label pin is of this kind. But if it is the
problem, then, why does it route correctly with IO line label pins and
also with power/ground pins even if there is only one cell containing
square power/ground pins?
Can anyone explain the action of SRoute when routing power and ground
nets?
Thank you very much!
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