does anyone have any general guidelines and perhaps some tutorials for
routing
allegro SI for designing around crosstalk, signal integrity, pcb
constraints for timing and manufacturability?
my knowlege on the subject:
i've taken various E&M courses so i know the theory behind it, and am
taking a digital systems class so i've ventured into the experimental
side, but its mostly been with transmission lines and not pcb traces
with hundreds of nets. what can be done besides ground/power planes
close to signal, thick/far apart traces, and slower rise times?
i only know a bit about bypass caps, heard something about parallel
plane pairs(?) and routing topology (something about short nets acting
as ****elds to long parallel nets?). can anyone explain those? and
tutorials / do***entation examples for putting it all together in
software (how to use constraints?)
